Wired IP ASIC Design Engineer Co-op (4 months) at Advanced Micro Devices, Inc

WHAT YOU DO AT AMD CHANGES EVERYTHING

At AMD, our mission is to build great products that accelerate next-generation computing experiences – from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond.

Together, we advance your career.

s an AMD co-op, you’ll be placed at the epicenter of the AI ecosystem, working alongside experts and industry pioneers. You’ll do important work, learn new skills, expand your network, and gain real-world experience on projects that impact millions of end-users worldwide. Whether you’re an undergrad or a PhD student, your contributions matter—and your experience here will be a launchpad for what comes next.

JOB DETAILS:

• Location: Ottawa, ON, Canada
• Onsite/Hybrid: This role requires the student to work full time (40 hours a week), in an onsite work structure throughout the duration of the co-op term..
• Duration: January 5, 2026, to April 24, 2026

WHAT YOU WILL BE DOING:

We are seeking a highly motivated Wired IP ASIC Design Engineering co-op to join our RTL design team developing ASIC, FPGA and Adaptive SoC intellectual property (IP) for the next generation network. You will have the opportunity to work with a highly motivated team, best-in-class configurable silicon and software and industry-leading security technologies for wired communications.

In this role –

• we will involve you in the creation and review of design documentation
• we will train you to implement RTL logic targeting leading edge ASIC, FPGA, and Adaptive SoC technologies
• we will assign you to the design, coding, and quality checks for innovative, high quality IP products
• your responsibilities will include collaboration with the verification team, allowing you to gain increased technical abilities in simulation debugging methodologies
• you will have an opportunity to learn lab debugging skills as you prototype and debug designs targeting lab hardware boards

WHO WE ARE LOOKING FOR:

• Pursuing a bachelors degree in Computer Engineering, Electrical Engineering, or a related field/discipline. Returning to school following the co-op term.
  
• Strong analytical and problem-solving skills, willing to learn, and ready to take on problems
• Interest in modern, complex networking architecture and digital design in general
• Understanding of digital design concepts including RTL (Verilog, System Verilog and/or VHDL) implementation
• Understanding of ASIC, FPGA, and/or Adaptive SoC solutions (industry or academic)
• Familiarity with functional verification and simulation tools
• Experience with scripting languages such as Python, Perl and TCL

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.