Senior Design Verification Engineer at 151 Semiconductor Components Industries, LLC
151 Semiconductor Components Industries, LLC · Bangalore, India · Onsite
- Senior
- Office in Bangalore
We are seeking a Digital Design Verification Engineer with at least 5 years of hands-on experience in digital IC design and verification. In this role, you will be responsible for ensuring the functional correctness, quality, and testability of advanced digital and mixed-signal IPs. You will collaborate closely with design, DFT, and physical design teams to deliver high-quality, production-ready IPs that meet stringent PPA and test requirements.
Key Responsibilities
- Develop and execute verification plans, testbenches, and testcases using SystemVerilog/UVM or equivalent verification methodologies.
- Drive DFT (Design for Test) and scan insertion strategy and implementation, including scan architecture, ATPG, MBIST, and boundary scan.
- Work closely with design and architecture teams to review specifications, define verification methodologies, and identify potential risks.
- Develop and maintain verification infrastructure (constrained random, coverage-driven, assertions, and checkers).
- Perform simulation, debug functional failures, and collaborate with designers to resolve issues.
- Support silicon bring-up and validation activities, correlating pre-silicon and post-silicon results.
- Contribute to continuous improvement of verification processes, tools, and flows to enhance productivity and quality..
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Responsibilities
Required Qualifications
- Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
- 3+ years of industry experience in digital design verification.
- Strong expertise in SystemVerilog, UVM, and functional verification methodologies.
- Experience with DFT concepts such as scan insertion, ATPG, BIST, and fault simulation.
- Solid understanding of digital design fundamentals, RTL coding, synthesis, and timing concepts.
- Hands-on experience with industry-standard EDA tools (Synopsys VCS, Cadence Xcelium, Mentor Questa, or equivalent).
- Proficiency in scripting (Perl, Python, or Tcl) to automate verification tasks.
- Strong problem-solving, debug, and communication skills with the ability to work in cross-functional teams.
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Qualifications
Preferred Qualifications
- Experience with low-power design verification (UPF/CPF).
- Exposure to memory IP verification (SRAM, ROM, NVM) and associated test methodologies.
Familiarity with formal verification tools and assertion-based verification
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