Principal Electronics Engineer I at CesiumAstro
CesiumAstro · Westminster, United States Of America · Onsite
- Professional
- Office in Westminster
Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State.
At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands-on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward-thinking individuals to join our team.
In this position, you will be responsible for FPGA circuits and systems through all phases of the development process. The ideal candidate will have experience in FPGA design, verification, test, and deployment at the HDL level. FPGA HDL designs will include high-speed serial interfaces and data streams, digital processing cores, multiple clocks and clock domains, and management interfaces. Testing, validation, and verification will also be central tasks for any FPGA design. Experience in digital signal processing or board-level hardware design are also desirable.
The successful candidate will present engineering design review materials to our customers and executive team, as well as participate in proposal-writing efforts. As such, excellent written and verbal communication skills are required.
In this position, you will be responsible for FPGA circuits and systems through all phases of the development process. The ideal candidate will have experience in FPGA design, verification, test, and deployment at the HDL level. FPGA HDL designs will include high-speed serial interfaces and data streams, digital processing cores, multiple clocks and clock domains, and management interfaces. Testing, validation, and verification will also be central tasks for any FPGA design. Experience in digital signal processing or board-level hardware design are also desirable. The successful candidate will present engineering design review materials to our customers and executive team, as well as participate in proposal-writing efforts. As such, excellent written and verbal communication skills are required.
JOB REQUIREMENTS AND MINIMUM QUALIFICATIONS
PREFERRED EXPERIENCE
CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate’s work experience, education/training, and key skills. Full-time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans.
CesiumAstro is an Equal Opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law.
Please note: CesiumAstro does not accept unsolicited resumes from contract agencies or search firms. Any unsolicited resumes submitted to our website or to CesiumAstro team members not through our approved vendor list or Talent Acquisition will be considered property of CesiumAstro, and we will not be obligated to pay any referral fees.
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