ASIC/SoC Design Verification Engineer bei IntelliPro Group Inc.
IntelliPro Group Inc. · San Jose, Vereinigte Staaten Von Amerika · Onsite
- Senior
- Optionales Büro in San Jose
Responsibilities and Duties
- Collaborate with design engineers and architects to define, documentand implement detailed test plans for the SoC designverification.Build and maintain infrastructure/environment forautomation verification of SoC architecture, function and performance.Develop reusable testbench, constrained-random/directed testcases,and verification associated behavioral module for both of blocklevels and system levels.Develop regression strategy, methodology andtools(scripts). Define and measure the function coverage. Closeverification holes for design releases and tape-out.Work with designengineers to debug and identify root causes of simulationfailure.Support test engineers for post-silicon validation.Mentor and coach team members and junior engineers. Driveverification efficiency
Qualifications and Skills
MS with 8+ years of relevant experience or PhD (with 3+ years of
experience) in Electrical Engineering, Computer Engineering, Computer
Science or related degree.In depth knowledge of UVM/OVM, Semiformal
Verification, assertion-based verification as well as hardware and
software co-verification methodology.
Extensive experience of building verification infrastructure, test
planning, coverage closure, testbench and testcases development for
function/performance verification.Proficient experience with Verilog,
System Verilog, Python/Perl/TCL/Shell scripting, C/C++, System C and
industry mainstream ISAs assembly coding.Familiarity with MIPI, AMBA
(APB/AHB/AXI) bus protocol, RISC-V/ARM or DSP core.Experience in
verifying designs at both of RTL level and post-P&R gate level.
Ability to work in a startup environment, and to work both
independently and as a team player with the ability to provide
technical leadership to other members of the engineering team
Experience in one or more of the following areas considered a strong
plus:Working knowledge of AI/ML Computing, GPU, ISP architectures andacceleratorsExperience in verifying mix-signal design and interface
of digital and analog.Experience of design verification for highspeed
IO such as PCIE and DDR.
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