Application Engineer bei Uchicago

Department

PME Quantum Engineering

About the Department

The Pritzker School of Molecular Engineering (PME; https://pme.uchicago.edu/) was established in May 2019 and evolved from the Institute for Molecular Engineering, which was founded in 2011. The PME integrates science and engineering to address global challenges from the molecular level up. The PME’s rigorous academic and research programs are made possible through the University of Chicago’s unique partnership with Argonne National Laboratory. The Pritzker School of Molecular Engineering is the first new school at the University of Chicago in three decades and the first school in the nation dedicated to molecular engineering. In the next phase of growth as a School, the PME will continue to expand its team of world-class faculty researchers and empower students from diverse backgrounds to collaborate with faculty in cutting-edge facilities. The PME aims to bring solutions for urgent societal problems to the forefront, while training the next generation of scientific leaders and entrepreneurs.

Job Summary

The University of Chicago, in collaboration with Fermilab, is seeking highly motivated Application Engineers to support the Advanced Chip Enablement, 3D Hub (ACE-3D), part of the NSF Chip Design Hub initiative. ACE-3D is building national capabilities in 3D heterogeneous integration and design enablement for the research and education community. Application Engineers will play a central role in enabling faculty, students, and collaborators to design, prototype, and test 3D integrated circuits (3D ICs), chiplets, and advanced packaging solutions.

This is an appointment at UChicago to be based at both UChicago and at Fermilab, with engineers working across both institutions to ensure seamless tool access, design flow development, and technical support for multi-project wafer (MPW) and advanced packaging runs.

Responsibilities

• Facilitates and promotes advanced technical/scientific research projects including data analysis. Recognizes the need for innovation and develops or incorporates advances in research concepts to help disseminate the results of research projects. Provides day-to-day operational oversight in support of the same.
• Trains new laboratory personnel.
• Develops, deploys, and maintains 3D IC design flows, including floor planning, partitioning, TSV/micro-bump design, and thermal/mechanical analysis.
• Provides hands-on support and training for researchers and students using industry-standard EDA tools (Cadence, Synopsys, Siemens) for 2.5D/3D design, heterogeneous integration, and packaging.
• Collaborates with foundries and OSATs, such as NHanced, to coordinate design submissions for 3D IC MPWs, ensuring compliance with planarity, size, and placement requirements.
• Automates workflows using scripting/programming (Python, TCL, shell) to streamline verification, simulation, and design-for-test methodologies.
• Interfaces with other NSF teams to support installation, licensing, and maintenance of EDA tools and PDKs.
• Documents methodologies and contributes to shared design enablement resources for the ACE-3D community.
• Supports cross-institutional collaborations, workshops, and tutorials that expand national workforce development in semiconductor design.
• Provides technical input for project deliverables, reports, and presentations to NSF and partner institutions.
• Collaborates and coordinates with other researchers in the group and joint research efforts.
• Uses solid understanding of construction to install and repair new and existing electronic systems. Analyzes equipment to establish operating data and conduct experimental tests.
• Conducts engineering studies and assigns work to technical staff. Builds knowledge of the organization, processes and customers. Plans own resources effectively to ensure projects are delivered on time, to standard and to budget.
• Performs other related work as needed.

Minimum Qualifications

Education:

Minimum requirements include a college or university degree in related field.

Work Experience:

Minimum requirements include knowledge and skills developed through 2-5 years of work experience in a related job discipline.

Certifications:

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Preferred Qualifications

Education:

• Bachelor’s or Master’s degree in electrical engineering, computer engineering, or a related field.

Experience:

• A minimum of 3 years of significant work experience.
• Chip design and testing.
• Background in academic and laboratory environments.
• Prior experience training or mentoring in design tools and workflows.

Technical Skills or Knowledge:

• Extensive understanding of EDA tools for IC design, packaging, and verification.
• Familiarity with 3D IC design concepts such as stacking, interposers, TSVs, and bump-level integration.
• Familiarity with multi-project wafer (MPW) submissions and foundry/OSAT interactions.
• Familiarity with advanced packaging technologies and verification methodologies.
• Strong computer programming and instrumentation interface skills in Python and C programming languages.
• Knowledge of Linux-based operating systems are highly desirable.
• Strong computer skills including calendaring, document management such as Dropbox, Box, etc., word processing, database management, and spreadsheet skills.
• Knowledge of statistical/analytical software.

Preferred Competencies

• Demonstrated administrative, problem-solving, organization and coordination skills.
• Demonstrated excellent oral and written communication skills.
• Excellent time management skills and handle multiple, concurrent tasks within deadlines with minimal supervision.
• Prioritize urgent tasks while ensuring established deadlines are met.
• Flexible and adaptable to changes in workflow and procedures.
• Handle stressful, sensitive, and confidential situations and information with absolute discretion.
• Knowledge and experience of related research techniques or methods.
• Knowledge of and familiarity with local and federal regulations, guidelines, and procedures.
   

Application Documents

• Resume/CV (required)
• Professional References Contact Information (required) (3)

Job Family

Research

Role Impact

Individual Contributor

Scheduled Weekly Hours

40

Drug Test Required

No

Health Screen Required

No

Motor Vehicle Record Inquiry Required

No

Pay Rate Type

Salary

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FLSA Status

Exempt

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Pay Range

$100,000.00 - $120,000.00

The included pay rate or range represents the University’s good faith estimate of the possible compensation offer for this role at the time of posting.

Benefits Eligible

Yes

The University of Chicago offers a wide range of benefits programs and resources for eligible employees, including health, retirement, and paid time off. Information about the benefit offerings can be found in the Benefits Guidebook.

Posting Statement

The University of Chicago is an equal opportunity employer and does not discriminate on the basis of race, color, religion, sex, sexual orientation, gender, gender identity, or expression, national or ethnic origin, shared ancestry, age, status as an individual with a disability, military or veteran status, genetic information, or other protected classes under the law. For additional information please see the University's Notice of Nondiscrimination.

 

Job seekers in need of a reasonable accommodation to complete the application process should call 773-702-5800 or submit a request via Applicant Inquiry Form.

 

All offers of employment are contingent upon a background check that includes a review of conviction history.  A conviction does not automatically preclude University employment.  Rather, the University considers conviction information on a case-by-case basis and assesses the nature of the offense, the circumstances surrounding it, the proximity in time of the conviction, and its relevance to the position.

 

The University of Chicago's Annual Security & Fire Safety Report (Report) provides information about University offices and programs that provide safety support, crime and fire statistics, emergency response and communications plans, and other policies and information. The Report can be accessed online at: http://securityreport.uchicago.edu. Paper copies of the Report are available, upon request, from the University of Chicago Police Department, 850 E. 61st Street, Chicago, IL 60637.

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