- Senior
- Optionales Büro in San Jose
Imagine being part of a team that’s redefining the future of mobility—where your ideas don’t just sit in a lab but power next-generation technology. At indie, we are developing cutting-edge semiconductors, photonics, and radar sensors and systems for automotive, industrial, and adjacent markets. Our innovations are at the heart of advanced intelligent sensing and user experience applications, pushing the boundaries of what’s possible.
If you're passionate about groundbreaking technology and want to make a real impact alongside a fast-paced team that thrives on creativity and collaboration, we’d love to have you on board!
We are seeking an RTL Chip Design Managerin our San Jose, CA office.
Responsibilities:
- Assist in managing the development of digital IPs for video-centric applications.
- Work closely with the senior management team in coordinating with chip architects overseeing the RTL design process, ensuring the successful generation and integration of digital IPs into the overall chip design.
- Under the close supervision of the senior management team, assist in the supervision of the RTL design process, ensuring adherence to industry best practices and design guidelines.
- Assist in managing the generation of digital IPs tailored for video-centric applications.
- Support the implementation of rigorous design verification processes to ensure the functionality and reliability of the RTL designs.
- Support the continuous improvement in design methodologies to enhance the quality of the integrated circuits, and the team work towards achieving a cohesive and optimized design that meets performance, power, and area (PPA) targets.
- Telecommute permitted from anywhere in the US.
- Position will supervise one Sr. Engineer Architect [17-2072] and one Digital Design Engineer [17-2072].
- Required education: Bachelor of Science degree or equivalent Electrical Engineering, Computer Engineering, or related.
- Required experience: 24 months as RTL Design Manager; or related occupation.
Additional minimum requirements: 24 months of work experience with each of the following:
1. Digital IPs for video-centric applications;
2. Translate high-level specifications into efficient RTL designs;
3. RTL design, Smart Connectivity technologies;
4. Video processing algorithms;
5. Industry-standard EDA tools and design methodologies.
40 hours/ week. Job site San Jose, CA. Salary $156,853/ year. EOE
indie Semiconductor and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.
We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Concerning agencies: indie Semiconductor does not accept unsolicited resumes and will not be responsible for fees related to such.
