IC Package Development Technologist bei Google
Google · San Diego, Vereinigte Staaten Von Amerika · Onsite
- Senior
- Optionales Büro in San Diego
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience.
- 8 years of experience in semiconductor packaging and technology development.
- Experience with Failure Mode and Effects Analysis (FMEA), design of experiment techniques (DOE), Statistical Process Control (SPC), Defect analysis and data analysis.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience.
- Experience working on Chip Package Interaction and Electromigration, effect relating to assembly, design, process condition, and reliability conditions.
- Experience in delivering advanced mobile packaging from inception to production, with solving complex problems.
- Experience with Assembly or SMT process.
- Understanding of microelectronic packaging technologies, including flip chip bumping, assembly manufacturing , substrate manufacturing or SMT.
- Knowledge of semiconductor quality and reliability standards and failure modes.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
The US base salary range for this full-time position is $156,000-$229,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about benefits at Google.
Responsibilities
- Define, develop and optimize manufacturing process for advanced package technologies for consumer devices.
- Establish the effects of assembly and bumping processes and its effect on both upstream and downstream, including effects such as Silicon ELK stress, and board level reliability.
- Drive EM evaluations and define requirements in package development roadmap as industry continues to push for fine pitch package solutions.
- Conduct root cause analysis and resolution of issues during both the development and production phases.
- Collaborate with suppliers, enabling internal reliability test.
