Hybrid Design Verification Engineer Design Verification Engineer

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Dear Candidates,

Hope you are doing great!!

Currently, we have a job opening for Design Verification Engineer with our client. If you are interested, then please reply to me with your updated resume or please call me at

Role: Design Verification Engineer

Work Location: Remote PST

Contract

Mandate : CPU/GPU Functional Verification Experience is Required.

Responsibilities:

• Plan the verification of complex design IP/SoC like CPU/Core/GFX block.
• Develop tests using UVM.
• Identify and write functional coverage for stimulus and corner cases.
• Analyze and debug test failures with designers to deliver functionally correct design.
• Assembly tests for any ISA is strongly desired but not required.
• Close coverage to plug verification holes and meet tape out requirements.
• IP integration DV.
• Stimulus generation tools development and automation.
  
  

Qualifications:

• Experience in design verification with a proven track record of delivering complex CPU or GPU's.
• CPU/GPU Functional Verification Experience is Required.
• Should be able to write the UVM Code and understand the design.
• In depth knowledge of verification principles, testbenches, stimulus generation and UVM based test environments.
• Solid understanding of computer architecture.
• Substantial background in debugging RTL (Verilog) designs.
• Good Knowledge of VCS Simulation and Scripting language such as Python.
  
  

Thanks & Regards,

Teja

VBeyond Corporation || PARTNERING FOR GROWTH

Hillsborough, New Jersey, USA

Email ID:

Desk:

Website :

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