- Senior
- Ufficio in San Diego
%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3ESAIC is seeking a highly skilled and motivated %3Cstrong%3ESenior Hardware Electrical Engineer%3C/strong%3E %26nbsp;in %3Cstrong%3ESan Diego, CA %3C/strong%3Especializing in Software Defined Radio (SDR) and RF receiver electrical design. The ideal candidate will have extensive experience in all phases of hardware design, from concept through design, modeling, and generating manufacturing files, with proficient use of specific tools and a deep understanding of environmental testing standards and principles. The position will be responsible for all activities associated with board-level and system-level integration of circuit card assemblies.%26nbsp;%3C/span%3E%3C/p%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3E%3Cstrong%3EThis is an ONSITE role in San Diego, CA. Must be local to area%3C/strong%3E%3C/span%3E%3C/p%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3E%3Cstrong%3EJOB DUTIES:%3C/strong%3E%3C/span%3E%3C/p%3E%3Cul%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3EPerform end-to-end hardware design tasks for SDR and RF receiver systems, including schematic design, layout, testing, and validation.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;mso-ansi-language:EN-US;mso-bidi-language:AR-SA;mso-fareast-font-family:Aptos;mso-fareast-language:EN-US;mso-fareast-theme-font:minor-latin;%22%3EDevelop and implement complex SDR architectures and RF receiver designs.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;mso-ansi-language:EN-US;mso-bidi-language:AR-SA;mso-fareast-font-family:Aptos;mso-fareast-language:EN-US;mso-fareast-theme-font:minor-latin;%22%3ECreate detailed hardware design models and simulations to validate design performance and reliability.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3EGenerate and manage manufacturing files and documentation for hardware production.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3EUtilize specific design and analysis tools such as Keysight ADS, Ansys HFSS, Cadence Allegro, Altium Designer, and Mentor Graphics PADS.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3ECollaborate with cross-functional teams, including software engineers, systems engineers, and manufacturing partners, to ensure seamless integration and product delivery.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3EConduct performance testing and troubleshooting of hardware components to ensure compliance with industry standards and specifications.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3EStay up-to-date with the latest advancements in SDR, RF technologies, and related hardware design best practices.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3EAnalyze supplier line replaceable units (LRUs), including step-file and 3D model review and compliance to specifications.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3ESupport system integration, test, development, and execution of various types of complex communications systems.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3EWork in a multi-disciplinary team with software, firmware, mechanical, and systems engineers.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3EResponsible for board-level design adhering to requirements, including PWB design and specification, floor planning, test and verification, and troubleshooting.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3ELead a team of mechanical engineers (MEs) and programmers to integrate analog and digital electronics to pass all milestone reviews and deliver products to DoD customers.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3EDesign and develop circuit boards using Altium Designer and other CAD systems.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3EFormulate concepts of operations, define requirements, perform analysis and engineering, architect systems, and design interfaces and data architectures.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3EValidate and verify designs, ensuring effective team implementation of product requirements into total systems solutions while acknowledging technical, schedule, and cost constraints.%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3Cli%3E%3Cp class=%22MsoNormal%22%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3E%3Cspan style=%22line-height:115%;%22%3EEnsure compliance with requirements at all stages of system development and integration.%3C/span%3E%3C/span%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18.0pt;%22%3E%3Cspan style=%22line-height:115%;%22%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3C/span%3E%3C/span%3E%3C/p%3E%3C/li%3E%3C/ul%3E%3Cp class=%22MsoListParagraphCxSpFirst%22 style=%22mso-list:l0 level1 lfo1;text-indent:-.25in;%22%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18.0pt;%22%3E%3Cspan style=%22line-height:115%;%22%3E%3Co:p%3E%3C/o:p%3E%3C/span%3E%3C/span%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3C/p%3E
%3Cp%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3E%3Cstrong%3EREQUIREMENTS:%3C/strong%3E%3C/span%3E%3C/p%3E%3Cul%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EBachelors and Fourteen (14) years or more experience; Master%27s and twelve (12) years or more experience; PhD or JD and nine (9) years or more experience%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EMust be a U.S. Citizen%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EMust have an Active Secret Clearance with the ability to obtain a Top Secret clearance after start.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EProven experience in hardware design, specifically in SDR and RF receiver design.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EProficiency in using hardware design tools such as Keysight ADS, Ansys HFSS, Cadence Allegro, Altium Designer, and Mentor Graphics PADS.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EStrong knowledge of RF concepts, digital signal processing (DSP), and electromagnetic theory.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3ECircuit card design experience with Altium or other design, layout, and simulation software.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EExpertise in analog and digital design, including serial communication, logic design, power design, signal filtering, and wave shaping.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EAbility to perform detailed schematic capture and PCB layout design.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EUnderstanding of RF and receiver architectures and the employment of related technologies down to the component-level (such as FPGAs, ASICs, and corresponding firmware implementation into larger payload hardware and software).%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EHands-on experience with environmental testing equipment and instrumentation.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EDirect experience working with military standards (MIL-STD-810, MIL-STD-461, etc.), NASA standards, or other federal agency-specific environmental testing requirements.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EFamiliarity with various environmental test standards and regulations (MIL-STD, IEC, ASTM, DO-160, etc.).%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EKnowledge of test fixture design principles.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EExcellent analytical and problem-solving skills, with attention to detail.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EAbility to work in a multi-disciplinary team with software, firmware, mechanical and systems engineers.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EExperience with Configuration Management Toolsets for version control of hardware, software, and documentation%3C/span%3E%3C/li%3E%3C/ul%3E%3Cp%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3E%3Cstrong%3EDESIRED SKILLS:%3C/strong%3E%3C/span%3E%3C/p%3E%3Cul%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EExperience with mixed-signal design and high-frequency circuit design.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EFamiliarity with industry standards and regulatory requirements for RF and SDR technologies.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EHands-on experience with lab instrumentation and measurement techniques for RF systems.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EKnowledge of firmware and software development for embedded systems is a plus.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EDOORS and Aras Toolsets experience.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3ECircuit simulation experience.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EDoD tactical and strategic radio receiver integration experience.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3ESafety Critical Hardware Design %26amp; Analyses (DoD, Medical, Automotive).%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EProduct Life Cycle Management experience.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EExperience with product development procedures, specifically iterative product design %26amp; development of embedded systems.%3C/span%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;%22%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3C/span%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18.0pt;%22%3E%3Cspan style=%22line-height:107%;%22%3E%3Co:p%3E%3C/o:p%3E%3C/span%3E%3C/span%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3C/li%3E%3C/ul%3E
*!SAIC accepts applications on an ongoing basis and there is no deadline.
SAIC® is a premier Fortune 500® mission integrator focused on advancing the power of technology and innovation to serve and protect our world. Our robust portfolio of offerings across the defense, space, civilian and intelligence markets includes secure high-end solutions in mission IT, enterprise IT, engineering services and professional services. We integrate emerging technology, rapidly and securely, into mission critical operations that modernize and enable critical national imperatives.
We are approximately 24,000 strong; driven by mission, united by purpose, and inspired by opportunities. SAIC is an Equal Opportunity Employer. Headquartered in Reston, Virginia, SAIC has annual revenues of approximately $7.5 billion. For more information, visit saic.com. For ongoing news, please visit our newsroom. Candidarsi ora
%3Cp%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3E%3Cstrong%3EREQUIREMENTS:%3C/strong%3E%3C/span%3E%3C/p%3E%3Cul%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EBachelors and Fourteen (14) years or more experience; Master%27s and twelve (12) years or more experience; PhD or JD and nine (9) years or more experience%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EMust be a U.S. Citizen%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EMust have an Active Secret Clearance with the ability to obtain a Top Secret clearance after start.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EProven experience in hardware design, specifically in SDR and RF receiver design.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EProficiency in using hardware design tools such as Keysight ADS, Ansys HFSS, Cadence Allegro, Altium Designer, and Mentor Graphics PADS.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EStrong knowledge of RF concepts, digital signal processing (DSP), and electromagnetic theory.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3ECircuit card design experience with Altium or other design, layout, and simulation software.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EExpertise in analog and digital design, including serial communication, logic design, power design, signal filtering, and wave shaping.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EAbility to perform detailed schematic capture and PCB layout design.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EUnderstanding of RF and receiver architectures and the employment of related technologies down to the component-level (such as FPGAs, ASICs, and corresponding firmware implementation into larger payload hardware and software).%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EHands-on experience with environmental testing equipment and instrumentation.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EDirect experience working with military standards (MIL-STD-810, MIL-STD-461, etc.), NASA standards, or other federal agency-specific environmental testing requirements.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EFamiliarity with various environmental test standards and regulations (MIL-STD, IEC, ASTM, DO-160, etc.).%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EKnowledge of test fixture design principles.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EExcellent analytical and problem-solving skills, with attention to detail.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EAbility to work in a multi-disciplinary team with software, firmware, mechanical and systems engineers.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EExperience with Configuration Management Toolsets for version control of hardware, software, and documentation%3C/span%3E%3C/li%3E%3C/ul%3E%3Cp%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3E%3Cstrong%3EDESIRED SKILLS:%3C/strong%3E%3C/span%3E%3C/p%3E%3Cul%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EExperience with mixed-signal design and high-frequency circuit design.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EFamiliarity with industry standards and regulatory requirements for RF and SDR technologies.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EHands-on experience with lab instrumentation and measurement techniques for RF systems.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EKnowledge of firmware and software development for embedded systems is a plus.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EDOORS and Aras Toolsets experience.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3ECircuit simulation experience.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EDoD tactical and strategic radio receiver integration experience.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3ESafety Critical Hardware Design %26amp; Analyses (DoD, Medical, Automotive).%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EProduct Life Cycle Management experience.%3C/span%3E%3C/li%3E%3Cli%3E%3Cspan style=%22font-family:Arial, Helvetica, sans-serif;font-size:18px;%22%3EExperience with product development procedures, specifically iterative product design %26amp; development of embedded systems.%3C/span%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;%22%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3C/span%3E%3Cspan style=%22font-family:%26quot;Arial%26quot;,sans-serif;font-size:18.0pt;%22%3E%3Cspan style=%22line-height:107%;%22%3E%3Co:p%3E%3C/o:p%3E%3C/span%3E%3C/span%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3Co:p%3E%3C/o:p%3E%3C/li%3E%3C/ul%3E
*!SAIC accepts applications on an ongoing basis and there is no deadline.
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We are approximately 24,000 strong; driven by mission, united by purpose, and inspired by opportunities. SAIC is an Equal Opportunity Employer. Headquartered in Reston, Virginia, SAIC has annual revenues of approximately $7.5 billion. For more information, visit saic.com. For ongoing news, please visit our newsroom. Candidarsi ora
