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Hybrid Senior Manager, Design Verification Engineering bei Aeva

Aeva · Bangalore, Indien · Hybrid

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About us
Aeva’s mission is to bring the next wave of perception to a broad range of applications from automated driving to industrial robotics, consumer electronics, consumer health, security, and beyond. Aeva is transforming autonomy with its groundbreaking sensing and perception technology that integrates all key LiDAR components onto a silicon photonics chip in a compact module. Aeva 4D LiDAR sensors uniquely detect instant velocity in addition to 3D position, allowing autonomous devices like vehicles and robots to make more intelligent and safe decisions.

Role Overview
As a leader of the Design Verification team at Aeva India, you will build and lead a team of talented verification engineers to verify new breeds of SoC for advanced perception applications utilizing 4-D Lidar.


What you'll be doing:
  • Build, manage and guide a team of passionate verification engineers.
  • You will be responsible for the complete verification of IP, Block, Subsystems, and SOC verification of 4D Lidar chips. 
  • You will work in a dynamic and startup environment and work closely with a team of passionate verification engineers to define the processes, methodology, and tools for the verification of complex SoCs.
  • You will work closely with cross-functional teams of Architects, RTL design and Verification, Physical Design, and System software teams to verify that SOC meets the functional, performance, and power goals defined in the architecture specs. 
  • Define and execute verification test plan for IP, Block, Subsystem, and ARM-based SOC using System Verilog/UVM methodology and C-based Firmware running on the on-chip processors 
  • Work with the different stakeholders and functional leads to ensure high-quality SoC delivery on time


    • What you have:
  • B.Tech/B.E in Computer Engineering (or allied discipline e.g. Electrical, Electronics)
  • 13+ years of experience in the design, verification, and validation of advanced ARM-based SOCs
  • 5+ years in building, managing, and mentoring large verification team span across multiple geographies
  • Deep understanding of ARM-based SOC Verification using SystemVerilog/UVM methodology. Writing assembly and C firmware for embedded ARM processors and debugging in a simulation environment
  • Hands-on experience in advanced verification techniques using constrained random verification methodology, building reference models, scoreboard, and self-checking TBs
  • Working experience in DSP (Digital Signal Processing) is highly desirable 
  • Working experience and knowledge in AMBA protocols, CoreSight Debugger, LPDDR, Ethernet, MIPI, and high-speed serdes 
  • Experience in building teams including hiring, mentoring, scheduling/budgeting, and providing focal reviews and feedbacks.
  • Ability to collaborate deeply with design, verification, architecture, and management teams
  • Ability to deliver results in a very fast-moving environment
  • Desire to learn & implement groundbreaking new processes and methodology for continuous verification improvement


    • Nice-to-haves:
  • Experience in pre-silicon validation on emulation platforms such as Cadence Palladium, Mentor Veloce, Synopsys Zebu 
  • Post-silicon bring-up and validation planning and execution
  • Diagnostics Firmware development and validation
    • Jetzt bewerben

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