Design-thinking Empregos à distância e no escritório em casa ∙ Página 70
10000 Empregos à distância e em escritório em casa online
Senior Interaction Designer, YouTube Comments
Google · San Bruno, Estados Unidos Da América · Hybrid
Senior AI Product Designer, Gemini Assistant
Google · Mountain View, Estados Unidos Da América · Hybrid
Senior AI Product Designer, Generative Media, Gemini App
Google · Seattle, Estados Unidos Da América · Hybrid
CAD Engineer – Design Verification Methodology
Apple · San Francisco, Estados Unidos Da América · Hybrid
Head of Sandbox Design - Halo Studios
Microsoft Corporation · Redmond, Estados Unidos Da América · Hybrid
Senior UX Writer and Content Designer, Search Ads
Google · Mountain View, Estados Unidos Da América · Hybrid
SoC Physical Design Engineer, PnR
Apple · Waltham, Estados Unidos Da América · Hybrid
- Escritório em Waltham
Role Number: 200641515-6205
Summary
We are seeking a seasoned Physical Design technical leader with deep expertise in high-performance & low-power design. In this highly visible role, you will work closely with cross-functional teams to come up with efficient chip and IP physical architecture taking into account physical design constraints early in the design cycle.
Description
- You will be responsible for all aspects of physical design implementation from RTL2GDS including PnR, bump/RDL, STA, physical verification, EMIR, sign-off.
- You will also collaborate to drive methodologies and "best-known methods" to streamline PD work and develop guidelines and checklists.
- You will be the primary technical contact for your focus area and are motivated to solve more challenging timing closure issues, area & power optimization etc.
Minimum Qualifications
- Minimum BS and 3+ years of relevant industry experience.
Preferred Qualifications
-
Knowledgeable in partition level P&R implementation including floorplanning, clock & power distribution, timing closure, and physical & electrical verification.
-
Knowledge of PD construction & analysis flows and methodology.
-
Strong interpersonal skills.
-
Recent successful tapeouts in deep submicron technology.
-
Experience with large SOC designs (>20M gates) with frequencies in excess of 1GHZ.
-
Shown ability to execute to stringent schedule & die size requirements.
-
Experienced in industry standard tools and understanding their capabilities and underlying algorithms.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant (https://www.eeoc.gov/sites/default/files/2023-06/22-088_EEOC_KnowYourRights6.12ScreenRdr.pdf) .