Technical Lead Product Engineer na Astera Labs

Role Overview

Astera Labs is seeking a Technical Lead Product Engineer to join our team in San Jose, CA. In this role, you will be at the intersection of silicon development and production excellence, ensuring our industry-leading connectivity solutions meet the highest standards of performance, reliability, and quality as they scale to volume production.

The ideal candidate possesses breadth of industry experience in high-speed product development in the field of product and/or test engineering, can apply fundamentals in circuit, ATE, and test program to aid problem solving, and is a self-driven, result focused go-getter in the pursuit of goals and objectives. You'll work across the full product lifecycle, partnering with design, applications, and operations teams to drive our connectivity products from tape-out to high-volume manufacturing. This is a high-impact role at a company experiencing explosive growth, where your work directly enables the AI infrastructure revolution.

With Astera Labs' portfolio spanning PCIe retimers, Ethernet solutions, and next-generation switching silicon operating at the bleeding edge of SerDes performance, you'll tackle some of the most demanding high-speed physical layer challenges in the semiconductor industry.

Key Responsibilities

• Define test coverage strategies that balance quality, cost, and throughput for volume manufacturing
• Correlate bench characterization results with ATE measurements to ensure production screening effectiveness
• Partner with OSAT and test vendors to bring up and qualify production test hardware and loadboards
• Drive silicon qualification and reliability testing to ensure products meet production readiness criteria
• Drive DFT and design-for-manufacturing improvements based on production test learnings
• Contribute to product specifications and datasheet development with measured silicon performance data
• Drive product level decisions in terms of production test coverage, test cost, power and thermal performance

Basic Qualifications

• Strong academic/technical background in electrical or computer engineering; bachelor’s is required; MS preferred
• Minimum of 5 years of experience in the field of post silicon product development dealing with high-speed IOs (product, test or validation)
• Hands-on work with ATE platform including test program updates for wafer sort and final test solutions
• Have gone through at least one cycle of full product development life cycle
• Strong problem-solving skills that involve system level analysis with test hardware, test program and DUT.
• Digital and analog circuit level understanding for DUT.
• Hands-on product/package qualification
• Excellent team player with great communication skills
• Professional attitude with the ability to prioritize a dynamic list of multiple tasks

Preferred Qualifications

• Understanding of NRZ/PAM4 SerDes protocols like PCIe (Gen3 and above), Ethernet (25G and above), and/or memory interfaces such as (LP)DDR5/4
• Partnering with Fabs on process development and yield improvement initiatives
• Collaboration with silicon validation teams to ensure device performance meets production requirements
• Experience in working with analog high-speed IO testing and characterization
• Firmware development in C/C++, scripting in Python, or other equivalent programming languages

The salary range for this position is $160,000 to $200,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits.